The present invention relates to a data processing device which is applied to a computed tomography system and calculates and processes projection data for image reconstruction and, more particularly, to a data processing device which calculates and processes projection data for image reconstruction according to a back-projection technique to convert the data into data for two-dimensional slice images.
Images obtained in a computed tomography scanning system (hereinafter referred to simply as "the CT system") are not converted into forms which we can understand (that is, visual images) until calculation and processing for image reconstruction are performed. In this sense, an image reconstruction device plays an extremely important role in the CT system. In general, the CT system consists of three subsystem: 1. a data acquisition subsystem, 2. an image reconstruction subsystem and 3. an image display and evaluation subsystem. In this image reconstruction, the projection data are obtained from detectors which rotate corresponding to the rotation of an X-ray source (so-called ROTATE/ROTATE system) and are disposed in opposition to this X-ray source with an object to be examined being interposed therebetween. The projection data are processed by a computer and converted into so-called CT numbers. The data for tomograms are formed from these CT numbers. The back-projection technique is one of the algorithms used for image reconstruction. The principle of the back-projection operation for getting the original image or picture is disclosed in U.S. Pat. No. 4,219,876 of Mizutani et al (Aug. 26, 1980), from line 9 to line 68 of the fifth column. In other words, the back-projection calculation is composed of a repetition of basic accumulation. The numbers of projection data and of display picture elements (hereinafter referred to as "pixel") have lately tended to increase to enable reconstruction of more precise images. Therefore, the amount of calculation executed by the data processing device for reconstruction processing has been still further increased. However, the scanning time in the data acquisition subsystem has been reduced to several seconds. Thus, it becomes necessary to correspondingly shorten the time for image reconstruction from the viewpoint of improvement in cost/performance of the CT system. Consequently, the CT system especially needs a data processing device which not only has a large calculating capacity, but also calculates at a high speed.
In a data processing device applied to a conventional CT system, matrix data consisting of 320 columns.times.320 rows, for example, are sequentially accumulated for every projection (for example, 600 projections as a whole) and stored in a memory (image memory). Then, the image reconstruction is performed according to the back-projection technique mentioned above. However, since the projection data are sequentially accumulated and processed for each of the 600 projections in the conventional data processing device, at least 600 memory accesses must be made for each row. The greater the number of memory accesses, the longer becomes the total access time, unless each memory access is speeded up. On the other hand, there is a predetermined limit to the access speed in the image memory. For the reasons described above, such a data processing device is defective in that the speedup of data processing is prevented.
In order to overcome this defect, it may be possible to employ a back-projection data generating section of the data processing device as a multiplex system and to simultaneously read out (interleave) a plurality of words stored in the image memory so that the speedup of data processing is realized. However, when the interleaving reaches or exceeds a certain limit, it becomes difficult to effectively use the image memory with regard to its capacity, which raises a problem of economy. A 16-bit IC memory is now generally considered to be economical as a single unit. However, when the image memory formed of 16-bit IC memory is multiplexed and interleaving above some limit is executed as described above, the area of the IC memory situated in the direction of the column becomes unavailable, and this produces much waste. In addition, the economic loss is increased, since the number of IC memories used is increased.